[okl4-developer] PMCs

[Peter Nguyen]

Hi,

Well, I think there would be given that if counters overflow, how are  
they handled exactly? I've been reading documentation about the APIC,  
which generates performance monitoring interrupts, which i would  
assume deals with counter overflows.

-----------------------------------------------------
Peter Nguyen
Jacaranda Research Group



On 07/01/2010, at 6:16 AM, Gabi Voiculescu wrote:

> Hi.
>
> I think there is no performance counter interrupt on any Intel  
> processor, except for Itanium.
> http://www.intel.com/software/products/documentation/vlin/mergedprojects/analyzer_ec/sampling_hh/performance_counters_on_intel(r)_processors.htm
>
> I saw that applications were making use of RTC interrupt to perform  
> polling of these counters.
> http://www.intel.com/software/products/documentation/vlin/mergedProjects/analyzer_ec/sampling_hh/event_based_sampling.htm
>
> --- On Mon, 1/4/10, Peter Nguyen <peter.nguyen at adelaide.edu.au> wrote:
>
> From: Peter Nguyen <peter.nguyen at adelaide.edu.au>
> Subject: [okl4-developer] PMCs
> To: "developer" <developer at okl4.org>
> Date: Monday, January 4, 2010, 1:07 PM
>
> Hi,
>
> In using the Pentium architecture for OKL4, does anyone know how to
> get the PMCs working in terms of generating a performance monitoring
> interrupt? I am able to activate the counters, but when an overflow
> occurs, nothing happens. I've tried switching execution to use the
> APIC code, but that doesn't seem to work at all. I suspect the kernel
> debugger uses it although only to print the values of registers rather
> than utilising the performance monitoring facilities at all.
>
> Any suggestions would be great.
> -----------------------------------------------------
> Peter Nguyen
> Jacaranda Research Group
>
>
>
>
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