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Mon Apr 14 11:21:15 EST 2008


<physical_memory name= ....
       ....
 </physical_memory>

and 

  <physical_pool name= ....
      ....
   </physical_pool>

and not for the memsection entries for my user program

<memsection name = ....>


Thank you,
Gabi Voiculescu


--------------------------------------------------------------------------------------------------------------
weaver.xml file:
<?xml version="1.0"?>
<!DOCTYPE image SYSTEM "weaver-1.1.dtd">
<image>
  <machine>
    <word_size size="0x20" />
    <virtual_memory name="virtual">
      <region base="0x1000" size="0xdffff000" />
    </virtual_memory>
    <physical_memory name="physical">
      <region base="0x100000" size="0x7eff000" type="conventional" />
    </physical_memory>
    <physical_memory name="etm_mem">
      <region base="0x10132000" size="0x1000" />
    </physical_memory>
    <physical_memory name="meter_mem">
      <region base="0xc0000000" size="0x1000" />
    </physical_memory>
    <physical_memory name="meter_ram_mem">
      <region base="0xe0000000" size="0x1000" />
    </physical_memory>
    <physical_memory name="tpiu_mem">
      <region base="0x10135000" size="0x1000" />
    </physical_memory>   
    <page_size size="0x1000" />
    <page_size size="0x10000" />
    <page_size size="0x100000" />
  </machine>

  <virtual_pool name="virtual">
    <memory src="virtual" />
  </virtual_pool>
  
  <physical_pool name="physical" direct="true">
    <memory src="physical" />
  </physical_pool>

  <physical_pool name="etm_pool" direct="true">
    <memory src="etm_mem" />
  </physical_pool>  
  <physical_pool name="meter_pool" direct="true">
    <memory src="meter_mem" />
  </physical_pool>
  <physical_pool name="meter_ram_pool" direct="true">
    <memory src="meter_ram_mem" />
  </physical_pool>
  <physical_pool name="tpiu_pool" direct="true">
    <memory src="tpiu_mem" />
  </physical_pool>
  
  <kernel file="/tst/port_2.1/build/pistachio/bin/kernel" xip="false" >
    <dynamic max_threads="0x400" />
    <config>
      <option key="root_caps" value="1024"/>
    </config>
  </kernel>

  <rootprogram file="/tst/port_2.1/build/iguana_server/bin/ig_server" virtpool="virtual" physpool="physical" >
  </rootprogram>

  <program name="empty_example" file="/tst/port_2.1/build/iguana/bin/empty_example" >
    <memsection name="etm_memsect" size="0x1000" physpool="etm_pool" />
    <memsection name="tpiu_memsect" size="0x1000" physpool="tpiu_pool" />
    <memsection name="meter_memsect" size="0x1000" physpool="meter_pool" />
    <memsection name="meter_ram_memsect" size="0x1000" physpool="meter_ram_pool" />
  </program>

</image>


       
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Content-Transfer-Encoding: 8bit

Hello<br><br>I am trying to access a few register sets directly from an iguana example build on top of the OKL4 2.1 'empty' example.<br><br><span style="font-weight: bold;" class="a">I have tried using hardware_back_memsection without success. </span><span style="font-weight: bold;">I have also seen a previous post on this matter:</span><br style="font-weight: bold;"><span class="a"><a style="font-weight: bold;" href="http://lists.okl4.org/pipermail/developer/2008-February/000607.html">http://lists.okl4.org/pipermail/developer/2008-February/000607.html</a><span style="font-weight: bold;"> </span><br style="font-weight: bold;"><span style="font-weight: bold;">and tried to apply the same rules to my weaver.xml. Obtained the file below. That does not map the physical page(s) either.</span><br><br><span style="font-weight: bold;">My problem is that I don't see the sections added in the page table, and the mapping_test function does not work.<br><br>On top of that, whenever I
 change something in the code machines.py gets overwritten with a file that has nothing defined in the &lt;program_name section of the weaver file. I have to execute my build script twice, copying the weaver.xml back into build/images/ the second time to have the images build correctly.<br><br></span>q0: Is hardware_back_memsection usefull in the OKL4 2.1? It always returns an error -1 when I try to use it in my example user application. I have tried the following code, not having the physical memory region premapped in the kernel (plat.cc) or in machies.py.<span style="font-weight: bold;"><br><br></span>struct etm_struct<br>{<br>&nbsp;&nbsp;&nbsp; memsection_ref_t ms;<br>&nbsp;&nbsp;&nbsp; uintptr_t ms_base;<br>};<br>....<br>&nbsp;&nbsp;&nbsp; struct etm_struct etm;<br>&nbsp;&nbsp;&nbsp; int res;<br>&nbsp;&nbsp;&nbsp; res = hardware_back_memsection(etm.ms, 0x10132000, L4_IOMemory);<span style="font-weight: bold;"><br><br><br></span>q1: Is the above mentioned email
 procedure still valid in OKL4 2.1?<br><br>q2: what am I doing wrong in weaver.xml?<br><br>q3: Do I need to modify machines.py or the SConstruct file from iguana/examples/empty folder to keep weaver.xml unchanged when I change my code?<br><br>q4: Where do I need to modify so that the <br>&lt;memsection name= ..../&gt;<br>lines don't disappear each time I change a file. <br><br>From what I can see adding more memory['xxx'] = [Region(....)] in machines.py only creates entries for <br><br></span><span class="a">&lt;physical_memory name= ....<br> &nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ....<br>&nbsp;&lt;/physical_memory&gt;<br><br>and <br></span><span class="a"><br></span><span class="a">&nbsp; &lt;physical_pool name= ....<br> &nbsp;&nbsp;&nbsp;&nbsp; ....<br> &nbsp; &lt;/physical_pool&gt;<br><br>and not for the memsection entries for my user program<br><br>&lt;memsection name = ....&gt;<br><br><br>Thank you,<br>Gabi Voiculescu<br><br><br></span><span
 class="a">--------------------------------------------------------------------------------------------------------------<br>weaver.xml file:<br>&lt;?xml version="1.0"?&gt;<br>&lt;!DOCTYPE image SYSTEM "weaver-1.1.dtd"&gt;<br>&lt;image&gt;<br>&nbsp; &lt;machine&gt;<br>&nbsp;&nbsp;&nbsp; &lt;word_size size="0x20" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;virtual_memory name="virtual"&gt;<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &lt;region base="0x1000" size="0xdffff000" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;/virtual_memory&gt;<br>&nbsp;&nbsp;&nbsp; &lt;physical_memory name="physical"&gt;<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &lt;region base="0x100000" size="0x7eff000" type="conventional" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;/physical_memory&gt;<br>&nbsp;&nbsp;&nbsp; &lt;physical_memory name="etm_mem"&gt;<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &lt;region base="0x10132000" size="0x1000" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;/physical_memory&gt;<br>&nbsp;&nbsp;&nbsp; &lt;physical_memory
 name="meter_mem"&gt;<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &lt;region base="0xc0000000" size="0x1000" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;/physical_memory&gt;<br>&nbsp;&nbsp;&nbsp; &lt;physical_memory name="meter_ram_mem"&gt;<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &lt;region base="0xe0000000" size="0x1000" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;/physical_memory&gt;<br>&nbsp;&nbsp;&nbsp; &lt;physical_memory name="tpiu_mem"&gt;<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &lt;region base="0x10135000" size="0x1000" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;/physical_memory&gt;&nbsp;&nbsp; <br>&nbsp;&nbsp;&nbsp; &lt;page_size size="0x1000" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;page_size size="0x10000" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;page_size size="0x100000" /&gt;<br>&nbsp; &lt;/machine&gt;<br><br>&nbsp; &lt;virtual_pool name="virtual"&gt;<br>&nbsp;&nbsp;&nbsp; &lt;memory src="virtual" /&gt;<br>&nbsp; &lt;/virtual_pool&gt;<br>&nbsp; <br>&nbsp; &lt;physical_pool name="physical" direct="true"&gt;<br>&nbsp;&nbsp;&nbsp;
 &lt;memory src="physical" /&gt;<br>&nbsp; &lt;/physical_pool&gt;<br><br>&nbsp; &lt;physical_pool name="etm_pool" direct="true"&gt;<br>&nbsp;&nbsp;&nbsp; &lt;memory src="etm_mem" /&gt;<br>&nbsp; &lt;/physical_pool&gt;&nbsp; <br>&nbsp; &lt;physical_pool name="meter_pool" direct="true"&gt;<br>&nbsp;&nbsp;&nbsp; &lt;memory src="meter_mem" /&gt;<br>&nbsp; &lt;/physical_pool&gt;<br>&nbsp; &lt;physical_pool name="meter_ram_pool" direct="true"&gt;<br>&nbsp;&nbsp;&nbsp; &lt;memory src="meter_ram_mem" /&gt;<br>&nbsp; &lt;/physical_pool&gt;<br>&nbsp; &lt;physical_pool name="tpiu_pool" direct="true"&gt;<br>&nbsp;&nbsp;&nbsp; &lt;memory src="tpiu_mem" /&gt;<br>&nbsp; &lt;/physical_pool&gt;<br>&nbsp; <br>&nbsp; &lt;kernel file="/tst/port_2.1/build/pistachio/bin/kernel" xip="false" &gt;<br>&nbsp;&nbsp;&nbsp; &lt;dynamic max_threads="0x400" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;config&gt;<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &lt;option key="root_caps" value="1024"/&gt;<br>&nbsp;&nbsp;&nbsp;
 &lt;/config&gt;<br>&nbsp; &lt;/kernel&gt;<br><br>&nbsp; &lt;rootprogram file="/tst/port_2.1/build/iguana_server/bin/ig_server" virtpool="virtual" physpool="physical" &gt;<br>&nbsp; &lt;/rootprogram&gt;<br><br>&nbsp; &lt;program name="empty_example" file="/tst/port_2.1/build/iguana/bin/empty_example" &gt;<br>&nbsp;&nbsp;&nbsp; &lt;memsection name="etm_memsect" size="0x1000" physpool="etm_pool" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;memsection name="tpiu_memsect" size="0x1000" physpool="tpiu_pool" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;memsection name="meter_memsect" size="0x1000" physpool="meter_pool" /&gt;<br>&nbsp;&nbsp;&nbsp; &lt;memsection name="meter_ram_memsect" size="0x1000" physpool="meter_ram_pool" /&gt;<br>&nbsp; &lt;/program&gt;<br><br>&lt;/image&gt;<br><br></span><p>&#32;

      
--0-628959004-1211671640=:12076--



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