[okl4-developer] Timer tick length

Peter Nguyen peter.nguyen at adelaide.edu.au
Mon Sep 24 12:20:51 EST 2007


Hi,

In reference to my original question, i was referring to L4 across
architectures.  The ia32 build uses a timer tick length of 1953 u-secs
and i was just wondering about how this was obtained (ie. does the intel
documentation mention this or is this determined somehow via some sort
of equation).

Peter

On Mon, 2007-09-24 at 12:00 +1000, developer-request at okl4.org wrote:
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> Today's Topics:
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>    1. Does OKL4 for pxa270 change any clock/frequency	setting?
>       (kashin Lin)
>    2. Re: Does OKL4 for pxa270 change any	clock/frequency setting?
>       (Ben Leslie)
>    3. Timer tick length (Peter Nguyen)
>    4. Re: Timer tick length (Ben Leslie)
> 
> 
> ----------------------------------------------------------------------
> 
> Message: 1
> Date: Sun, 23 Sep 2007 17:15:45 +0800
> From: "kashin Lin" <kashin08 at gmail.com>
> Subject: [okl4-developer] Does OKL4 for pxa270 change any
> 	clock/frequency	setting?
> To: developer at okl4.org
> Message-ID:
> 	<6bd1be890709230215m3fc928p820d6cd3c7a4ed98 at mail.gmail.com>
> Content-Type: text/plain; charset="iso-8859-1"
> 
> Hi,
> 
> i wonder whether OKL4( include l4[pistachio] & l4linux[WOMBAT]) modify the
> value
> in CCCR & CLKCFG? or just use default value in those registers?
> 
> my develop board have some bugs when using the wrong clock/frequency setting
> ,
> so i must check it.
> 
> thanks for your answering.
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> ------------------------------
> 
> Message: 2
> Date: Mon, 24 Sep 2007 10:03:47 +1000
> From: Ben Leslie <benno at ok-labs.com>
> Subject: Re: [okl4-developer] Does OKL4 for pxa270 change any
> 	clock/frequency setting?
> To: kashin Lin <kashin08 at gmail.com>
> Cc: developer at okl4.org
> Message-ID: <20070924000347.GD1203 at cse.unsw.edu.au>
> Content-Type: text/plain; charset=us-ascii
> 
> On Sun Sep 23, 2007 at 17:15:45 +0800, kashin Lin wrote:
> >Hi,
> >
> >i wonder whether OKL4( include l4[pistachio] & l4linux[WOMBAT]) modify the
> >value
> >in CCCR & CLKCFG? or just use default value in those registers?
> >
> >my develop board have some bugs when using the wrong clock/frequency setting
> >,
> >so i must check it.
> >
> >thanks for your answering.
> 
> 
> Hi Kashin,
> 
> We generally just leave this alone and print out what is configured by
> the bootloader.  The relevant code to look at is
> /pistachio/platform/pxa/src/timer.cc
> 
> Cheers,
> 
> Ben
> 
> 
> 
> ------------------------------
> 
> Message: 3
> Date: Mon, 24 Sep 2007 10:08:25 +0930
> From: Peter Nguyen <peter.nguyen at adelaide.edu.au>
> Subject: [okl4-developer] Timer tick length
> To: developer at okl4.org
> Message-ID: <1190594305.30470.0.camel at localhost>
> Content-Type: text/plain
> 
> Hi,
> 
> Is the timer tick length used fixed across all implementations?
> 
> Peter
> 
> 
> 
> ------------------------------
> 
> Message: 4
> Date: Mon, 24 Sep 2007 11:15:18 +1000
> From: Ben Leslie <benno at ok-labs.com>
> Subject: Re: [okl4-developer] Timer tick length
> To: Peter Nguyen <peter.nguyen at adelaide.edu.au>
> Cc: developer at okl4.org
> Message-ID: <20070924011518.GC2063 at cse.unsw.edu.au>
> Content-Type: text/plain; charset=us-ascii
> 
> On Mon Sep 24, 2007 at 10:08:25 +0930, Peter Nguyen wrote:
> >Hi,
> >
> >Is the timer tick length used fixed across all implementations?
> >
> 
> Hi Peter,
> 
> Do you mean across different L4 implementations or different
> architectures in OKL4. In both cases the timer tick length ends
> up being implementation specific. 
> 
> Part of our anticipated development is to enable variable length
> timers, so that rather than a constant tick, timer interrupts
> are only received at the end of the current thread's timeslice.
> 
> Cheers,
> 
> Ben
> 
> 
> 
> ------------------------------
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> End of Developer Digest, Vol 6, Issue 19
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