[okl4-developer] About the virtual memory management of OKL4

[kashin Lin]

Hi,

i have read okl4-progmanual & iguana-usermanual, but confused their memory
management.

in l4 microkernel, threads in the same address space belong to the same
process(task). so it means
there will be various address
space. but with iguana, all threads belong to the same process(task) are
in the same
address space with different PD. all thread created by iguana are also
l4 threads ,
why those difference exist?

in l4 microkernel, threads can communicatin between different or same  AS by
l4_IPC. but
according to iguana manual, why it says "Explicit L4 mapping IPC is not
permitted between Iguana
protection domains". threads created with iguana are in the same AS, aren't
they?

if i created a thread, what's are the address space it can access (PHY
addr)?
either creating a thread "directly on L4" or "with iguana", will the
PHY address
it can access be different?

(in okl4-progmanual, it says "This address space is initialised at boot time
by the microkernel based
on the initial mapping descriptors in the KIP memory descriptors as
described in Chapter B-5."
but it's missing)


maybe these quetions due
to my less comprehend of the relationship between l4 & iguana.
so it will be better if you can show me that.

i really need to comprehend those. any help will be welcome!
thanks in advance~

best regard,

kashin lin

2007/11/12, Jorge Torres <jorge.torres.maldonado at gmail.com>:
>
> Hi kashin,
>
>
> At okl4 microkernel; resources accessible from MMU are always mapped,
> which might be the case of your DSP, I cannot explain it better than the
> okl4-progmanual, which you can find at the oklabs web site, please read the
> address spaces section (A-3),
>
> Cheers,
>
> Jorge
>
> On Nov 12, 2007 10:30 AM, kashin Lin <kashin08 at gmail.com> wrote:
>
> > Hi,
> >
> > i have some quetions about the virtual memory management of OKL4.
> > ( i am not familiar with
> > its manage rule, are there any documents i can refer to?)
> >
> > following are my questions:
> > 1. what is the scheme of the mapping from PHY address to VIRT address in
> > OKL4 (pistachio)?
> >     what source codes deal with it?
> >
> > 2. the platform i run OKL4 is a development board with a
> > xscale pxa270 CPU  and a DSP.
> >     i know the PHY address of the DSP, and CPU can transfer data to it
> > through this address.
> >     but in OKL4, it seems it used VIRT memory instead of PHY memory.
> >     so how to let the L4's application transfer data to DSP?
> >     if i should build the PHY address to VIRT address mapping first,
> > what files i should modify?
> >     or i can use PHY address directly?
> >
> > thanks for your help
> >
> >
> > Best regard,
> >
> > kashin lin
> >
> >
> >
> > _______________________________________________
> > Developer mailing list
> > Developer at okl4.org
> > https://lists.okl4.org/mailman/listinfo/developer
> >
> >
>
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